where we are: the bottom of the stack
You're looking at four transistors. Below this is silicon physics; above is everything we'll build — memory, arithmetic, registers, a CPU. This page is the simplest universal logic device: a CMOS NAND gate.
Why start with NAND? Because it's functionally complete — every other logic operation (AND, OR, NOT, XOR), every kind of memory, every arithmetic circuit can be built from just NANDs. A billion of these wired in clever patterns is, very literally, what a computer is.
Vdd at the top, GND at the bottom, A and B inputs from the left, Y output on the right. Click A or B to toggle inputs and watch which transistors conduct.
click A → 1
P_A snaps dark; only P_B is still on. But that's enough — either PMOS being open delivers Vdd to Y. Y stays HIGH. Below, N_A lights up (its gate is now high), but N_B is still dark.
This is the asymmetry that defines the gate: only one PMOS is needed to deliver power, but both NMOS are needed to sink it.
click B → 1
Watch the B wire — in v2 it enters from the LEFT (bottom), snakes through a corridor, and climbs to P_B's gate at the top right. Long path, but every wire enters its destination perpendicular to the edge.
Now both inputs are 1. P_B turns off — no PMOS is conducting. N_B finally lights up, completing the chain N_A → mid → N_B → GND. Y plunges to LOW.
click A → 0
The chain breaks at N_A. The pull-up reopens through P_A, and Y pops back to HIGH. By symmetry, B → 0 would do the same.
the key insight
Y is LOW only when both inputs are HIGH; otherwise HIGH. That's NAND — NOT AND. Topology gives us the truth table: the PMOS pair is wired in parallel (an OR — either delivers power), and the NMOS pair is in series (an AND — both must conduct to sink).
The OR/AND asymmetry on top vs. bottom is what writes the gate's behavior into silicon.
why this matters
Every digital chip can be built from NAND alone. AND, OR, NOT, XOR, latches, adders, the whole CPU — all reducible. NAND is functionally complete.
And CMOS NAND: in either steady state exactly one path is closed, so no DC current flows. Power is consumed only during a switch. That's the difference between a CPU you can hold and one that needs a small reactor.