where we are: from "compute" to "remember"
The NAND on the previous page was stateless — same inputs, same output, no memory of the past. This page does something paradoxical: it wires two of those memoryless gates into a loop, and the result remembers.
There's no special memory cell anywhere — just two stateless gates whose outputs feed each other's inputs. The wiring creates two self-consistent patterns, and once knocked into one, the loop holds itself indefinitely. This is the seed of all digital memory.
Two NANDs (N1, N2), cross-coupled in the middle. Active-low commands S̄ and R̄ knock the loop into one stable state or the other.
click S̄ → 0
S̄ goes dark. N1 sees a 0 on one input. Here's the NAND rule that makes everything work: any 0 on the inputs forces the output to 1. The 0 dominates. Q lights up.
That fresh 1 flows out N1's right side and also down into N2's other input. N2 now sees two 1s, output drops to 0. Q̄ goes dark. The bright wire in the middle has swapped direction. The cell now holds a 1.
click S̄ → 1 — the magic moment
Release the command. S̄ goes back to 1. But Q stays high.
Q̄ is 0, and that 0 feeds back into N1's other input. By the NAND rule, that 0 alone locks N1's output at 1 — S̄ has nothing more to say. And Q=1 keeps both of N2's inputs high, locking N2 at 0. The loop is sustaining itself.
The command is gone. The bit stays. This is the moment a piece of memory just came into existence, built from two gates that individually can't remember anything.
click R̄ → 0
The opposite command. R̄ goes dark, N2 sees a 0, the NAND rule forces N2's output to 1. Q̄ lights up, climbs the corridor into N1's input, N1 sees two 1s, Q goes dark. Symmetric to the SET case.
click R̄ → 1
Release. Mirror of step 3. Q=0 feeds back into N2 and locks its output at 1. The loop holds itself again. The cell stores a 0 and will sit there indefinitely.
the loop IS the memory
Two NANDs. One loop. Two stable patterns:
pattern A — (N1=0, N2=1) — "storing 0"
pattern B — (N1=1, N2=0) — "storing 1"
Both are self-consistent — feed those outputs back and the NANDs compute the same outputs. Fixed points of the loop. The cell sits in whichever pattern it was last knocked into.
why this matters
This is the simplest possible memory. Every byte of state in every digital machine ultimately bottoms out in some flavor of this loop.
One layer up (D latch) adds a clock-gated front door. One above that (D flip-flop) pairs two latches with opposing clocks for edge-triggered capture. From there it's quantity, not concept — a few thousand in a register file, hundreds of millions in an L1 cache.